This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to input output cell design and placement for integrated circuits.
The surface of an integrated circuit such as an ASIC or an ASSP can be logically divided into two different portions, being the input output of the integrated circuit, and the core 20 of the integrated circuit as depicted in FIGS. 4 and 5. As depicted in FIG. 1, the input output of the integrated circuit 10a includes input output cells 14a that are connected to bonding pads 16, such as by lines 18, and to the core 20 of the integrated circuit 10a, such as by lines 22. Thus, all communication with the core 20 of the integrated circuit 10a is typically handled through the input output of the integrated circuit 10a. 
Integrated circuits are typically categorized as being either input output limited, as depicted in FIG. 4, or core limited as depicted in FIG. 5. An input output limited integrated circuit 10a, as depicted in FIG. 4, is one in which the size of the substrate on which the integrated circuit is formed is predominantly determined by the space required by the input output cells 14a. In other words, any additional input output cells 14a required by an input output limited integrated circuit 10a results in an increase in the size of the substrate. Typically, more than a single row of bonding pads 16a and 16b is required around the peripheral edge of an input output limited integrated circuit 10a. In an input output limited integrated circuit 10a, there is typically ample surface area for the space requirements of the core cells 20.
On the other hand, a core limited integrated circuit 10b, as depicted in FIG. 5, is one in which the size of the substrate on which the integrated circuit 10b is formed is predominantly determined by the space required by the core cells 20. In other words, any additional core cells 20 required by a core limited integrated circuit 10b results in an increase in the size of the substrate. Typically, only a single row of bonding pads 16 is required around the peripheral edge of a core limited integrated circuit 10b. In a core limited integrated circuit 10b there is typically ample surface area for the space requirements of the input output cells 14a. 
In an input output limited integrated circuit 10a (FIG. 4), the input output cells 14a are typically narrow and tall, meaning that the length of the input output cell 14a along an edge that is substantially parallel to the peripheral edge 12 of the integrated circuit 10a tends to be appreciably shorter than the length of an edge that is substantially perpendicular to the peripheral edge 12 of the integrated circuit 10a such as depicted in FIG. 1. In this manner, many input output cells can be placed along the length of the peripheral edges 12 of the integrated circuit 10a. Although the tall input output cells 14a tend to extend relatively far into the core 20 of the integrated circuit 10a this is typically not a problem because, as mentioned above, there tends to be ample surface area for the core components of an input output limited integrated circuit 10a. 
On the other hand, the tall and narrow design of an input output cell that is optimized for an input output limited integrated circuit is extremely inefficient for a core limited integrated circuit. The reason for this is that in a core limited integrated circuit, the input output cells may be more widely spaced apart, because fewer of them are required. Thus, there tends to be a large amount of wasted surface area between the narrow input output cells in such a design. However, as mentioned above, the tall input output cells tend to extend relatively far into the core of the integrated circuit, which for a core limited integrated circuit is already densely populated. Thus, the height of the tall and narrow input output cells requires the overall size of the substrate on which the integrated circuit is formed to be larger to accommodate the length of the input output cells. Because there is wasted space between the input output cells, this tends to result in a very inefficient use of the substrate surface area, and unnecessarily increases the cost of production of the integrated circuit.
A better design for an input output cell 14b of a core limited integrated circuit 10b would be a relatively wide, relatively short input output cell 14b, as depicted in FIG. 2, which design is substantially the opposite of the aspect ratio of the input output cell 14a designed for an input output limited integrated circuit 10a. However, because most integrated circuits tend to be input output limited rather than core limited, there are typically many input output cell designs that are available for use in an input output limited integrated circuit 10a design.
Because it is complicated and time consuming to develop a new input output cell design, and such a design for a core limited integrated circuit would tend to be used very little, many designers just use the input output cells that are designed for input output limited integrated circuits, even when they have a core limited integrated circuit, so that they do not have to take the time and expense of designing an input output cell for the core limited integrated circuit. Although this results in an integrated circuit that is more expensive than is necessary, it is often less expensive than taking the time to create a new core limited input output cell design.
Adding to this problem is the surface area on the substrate which is taken by the corner cells 24, where input output cells 14 cannot be placed, as depicted in FIG. 3. The corner cells 24 are typically disposed in the corners of the integrated circuit 10, where the buss lines, such as VSS 32, VDD 30, IDDtn (not depicted so as to enhance the clarity of the figure), VDDio 28, and VSSio 26 are turned at the corner from tracking in a parallel fashion a first peripheral edge 12a of the integrated circuit 10 to an adjoining second peripheral edge 12b of the integrated circuit 10 that is perpendicular to the first peripheral edge 12a. Because the buss lines 26, 28, 30, and 32 cut through the corner cell 24 at an angle, a standard input output cell 14 cannot be placed in the corner region inhabited by the corner cell 24, because it would not make proper electrical connections with the buss lines 26, 28, 30, and 32, which are not disposed in the same positions in the corner regions as they are along the peripheral edges.
Thus, there is a need for integrated circuit designs and elements that overcome these and other problems.
The above and other needs are met by a method for designing an input output cell of an integrated circuit. The input output cell has a required area, a width, and a height. The bonding pad pitch length between adjacent bonding pads of the integrated circuit is measured. The width of the input output cell is specified to be substantially equal to the bonding pad pitch length. The required area is divided by the width to determine a first value, and the height of the input output cell is specified to be substantially equal to the first value.
In this manner, the width of the input output cells is no greater than the distance between two adjacent bonding pads, and thus the input output cells can be placed very close together, facilitating their use in input output limited integrated circuit designs. However, the height of the input output cells is no greater than is necessary to enclose the required area of the input output cell, thus facilitating their use in core limited integrated circuit designs. In various preferred embodiments, the bonding pads for the input output cells are disposed within their surface areas, thereby further reducing the surface area of the integrated circuit that is required for the input output functions of the integrated circuit.
According to another aspect of the invention, electrically conductive buss lines are disposed within a first set of layers along peripheral edges of the integrated circuit. Electrically conductive jumpers are disposed on a second set of layers in corners of the integrated circuit. Electrically conductive vias are disposed in the corners of the integrated circuit for electrically connecting one of the electrically conductive buss lines disposed along a first peripheral edge of the peripheral edges with an associated one of the electrically conductive buss lines disposed along a second adjoining peripheral edge of the peripheral edges through an associated one of the electrically conductive jumpers.
In this manner, the electrically conductive buss lines can extend clear along the peripheral edges of the integrated circuit, and standard input output cells, such as those described herein, can be placed in the corner portions of the integrated circuit, in a position where corner cells have typically been placed. Thus, an integrated circuit according to the present invention provides for additional input output cells to be place on the integrated circuit, in space that was formerly unavailable for such, and thus reduces the space requirements for an integrated circuit.